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140 lines
4.3 KiB

Release 14.7 par P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
danacus-desktop:: Mon Apr 04 15:13:26 2022
par -w -intstyle ise -ol high -t 1 topFour_map.ncd topFour.ncd topFour.pcf
Constraints file: topFour.pcf.
Loading device for application Rf_Device from file '3s200.nph' in environment /opt/Xilinx/14.7/ISE_DS/ISE/.
"topFour" is an NCD, version 3.2, device xc3s200, package ft256, speed -4
Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000 Celsius)
Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts)
INFO:Par:282 - No user timing constraints were detected or you have set the option to ignore timing constraints ("par
-x"). Place and Route will run in "Performance Evaluation Mode" to automatically improve the performance of all
internal clocks in this design. Because there are not defined timing requirements, a timing score will not be
reported in the PAR report in this mode. The PAR timing summary will list the performance achieved for each clock.
Note: For the fastest runtime, set the effort level to "std". For best performance, set the effort level to "high".
Device speed data version: "PRODUCTION 1.39 2013-10-13".
Device Utilization Summary:
Number of External IOBs 29 out of 173 16%
Number of LOCed IOBs 29 out of 29 100%
Number of Slices 6 out of 1920 1%
Number of SLICEMs 0 out of 960 0%
Overall effort level (-ol): High
Placer effort level (-pl): High
Placer cost table entry (-t): 1
Router effort level (-rl): High
Starting initial Timing Analysis. REAL time: 0 secs
Finished initial Timing Analysis. REAL time: 0 secs
Starting Placer
Total REAL time at the beginning of Placer: 0 secs
Total CPU time at the beginning of Placer: 0 secs
Phase 1.1 Initial Placement Analysis
Phase 1.1 Initial Placement Analysis (Checksum:275f6c87) REAL time: 0 secs
Phase 2.7 Design Feasibility Check
Phase 2.7 Design Feasibility Check (Checksum:275f6c87) REAL time: 0 secs
Phase 3.31 Local Placement Optimization
Phase 3.31 Local Placement Optimization (Checksum:275f6c87) REAL time: 0 secs
Phase 4.2 Initial Clock and IO Placement
Phase 4.2 Initial Clock and IO Placement (Checksum:275f6c87) REAL time: 0 secs
Phase 5.36 Local Placement Optimization
Phase 5.36 Local Placement Optimization (Checksum:275f6c87) REAL time: 0 secs
Phase 6.8 Global Placement
..
Phase 6.8 Global Placement (Checksum:a95b231a) REAL time: 0 secs
Phase 7.5 Local Placement Optimization
Phase 7.5 Local Placement Optimization (Checksum:a95b231a) REAL time: 0 secs
Phase 8.18 Placement Optimization
Phase 8.18 Placement Optimization (Checksum:a96a64c5) REAL time: 0 secs
Phase 9.5 Local Placement Optimization
Phase 9.5 Local Placement Optimization (Checksum:a96a64c5) REAL time: 0 secs
Total REAL time to Placer completion: 0 secs
Total CPU time to Placer completion: 0 secs
Writing design to file topFour.ncd
Starting Router
Phase 1 : 44 unrouted; REAL time: 0 secs
Phase 2 : 34 unrouted; REAL time: 0 secs
Phase 3 : 6 unrouted; REAL time: 0 secs
Phase 4 : 6 unrouted; (Par is working to improve performance) REAL time: 0 secs
Phase 5 : 0 unrouted; (Par is working to improve performance) REAL time: 0 secs
Updating file: topFour.ncd with current fully routed design.
Phase 6 : 0 unrouted; (Par is working to improve performance) REAL time: 0 secs
Phase 7 : 0 unrouted; (Par is working to improve performance) REAL time: 0 secs
Phase 8 : 0 unrouted; (Par is working to improve performance) REAL time: 0 secs
Total REAL time to Router completion: 0 secs
Total CPU time to Router completion: 0 secs
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
Generating "PAR" statistics.
Timing Score: 0 (Setup: 0, Hold: 0)
Generating Pad Report.
All signals are completely routed.
Total REAL time to PAR completion: 0 secs
Total CPU time to PAR completion: 0 secs
Peak Memory Usage: 509 MB
Placement: Completed - No errors found.
Routing: Completed - No errors found.
Number of error messages: 0
Number of warning messages: 0
Number of info messages: 1
Writing design to file topFour.ncd
PAR done!